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TB6556FG 2012-10-22 1 toshiba bi-cmos integrated circuit silicon monolithic TB6556FG 3-phase full-wave sine-wave pwm brushless motor controller the TB6556FG is designed for motor fan applications for three-phase brushless dc (bldc) motors. features ? sine-wave pwm control ? built-in triangular-wave generator (carrier cycle = f osc /252 (hz)) ? built-in lead angle control function (0 to 58 in 32 steps) external setting/automatic internal setting ? built-in dead time function (setting 1.9 s or 3.8 s) ? overcurrent protection signal input pin ? built-in regulator (v refout = 5 v (typ.), 30 ma (max)) ? operating supply voltage range: v cc = 6 v to 10 v weight: 0.63 g (typ.)
TB6556FG 2012-10-22 2 block diagram some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purpose s. phase v system clock generator position detector regulator counter 5-bit ad 6-bit triangular wave generator output waveform generator data select switching 120/180 and gate block protection on/off setting dead time charger 120- turn-on matrix power-on reset protection & reset 14 15 21 20 19 2 1 13 23 11 3 18 17 16 12 4 7 5 8 6 9 10 phase matching fg rotating direction st/sp cw/ccw err gb comparator comparator comparator comparator pwm hu hv hw phase w phase u x in x out hu hv hw v e v cc gnd v refout res i dc cw/ccw fg rev t d ph u x v y w z os internal reference voltage ss peak hold filter + 25 24 26 27 la 28 lower limit upper limit 30 29 g in g out lpf ll ul 22 120/180
TB6556FG 2012-10-22 3 pin description pin no. symbol description remarks 21 hu positional signal input pin u 20 hv positional signal input pin v 19 hw positional signal input pin w when positional signal is hhh or lll, gate block protection operates. with built-in pull-up resistor, built-in digital filter ( 500 ns) 18 cw/ccw rotation direction signal input pin l: forward h: reverse 11 res reset-signal-input pin l: reset (output is non-active) operation/halt operation, also used for gate protection, built-in pull-up resistor 2 v e voltage command signal with built-in pull-down resistor 24 g in 25 g out gain setting i dc signal level at a gain that optimizes the la 26 ph peak hold connect the peak-hold capacitor and discharge resistor to gnd, parallel to each other 27 lpf rc low-pass filter connect the low-pass filter capacitor (built-in 100 k ? resistor) 28 la lead angle setting signal input pin sets 0 to 58 in 32 steps 29 ll lower limit for la set lower limit for la (ll = 0 v to 5.0 v) 30 ul upper limit for la set upper limit for la (ul = 0 v to 5.0 v) 12 os inputs output logic select signal l: active low h: active high 3 i dc inputs overcurrent protection signal inputs dc link current. reference voltage: 0.5 v with built-in filter ( 1 s), built-in digital filter ( 1 s) 14 x in inputs clock signal 15 x out outputs clock signal with built-in feedback resistor 23 v refout outputs reference voltage signal 5 v (typ.), 30 ma (max) 17 fg fg signal output pin outputs 3 ppr of positional signal 16 rev reverse rotation detection signal detects reverse rotation. 9 u outputs turn-on signal 8 v outputs turn-on signal 7 w outputs turn-on signal 6 x outputs turn-on signal 5 y outputs turn-on signal 4 z outputs turn-on signal select active high or active low using the output logic select pin. 1 v cc power supply voltage pin v cc = 6 to 10 v 10 t d inputs setting dead time l: 3.8 s, h or open: 1.9 s 22 ss 120/180 select signal l: 120 turn-on mode, h or open: 180 turn-on mode 13 gnd ground pin D
TB6556FG 2012-10-22 4 input/output equiva lent circuits pin description symbol input/output signal input/output internal circuit positional signal input pin u positional signal input pin v positional signal input pin w hu hv hw digital with schmitt trigger hysteresis 300 mv (typ.) digital filter: 500 ns (typ.) l: 0.8 v (max) h: v refout ? 1 v (min) forward/reverse switching input pin l: forward (cw) h: reverse (ccw) cw/ccw digital l: 0.8 v (max) h: v refout ? 1 v (min) reset input l: stops operation (reset) h: operates res digital l: 0.8 v (max) h: v refout ? 1 v (min) 120/180 select signal l: 120 turn-on mode h: 180 turn-on mode (open) ss digital with schmitt trigger hysteresis: 300 mv (typ.) l: 0.8 v (max) h: v refout ? 1 v (min) voltage command signal 1.0 v < v e 2.1 v refresh operation (x, y, z pins: on duty of 8%) v e analog input voltage range 0 to 5.4 v input voltage of 5.4 v or higher is clipped to 5.4 v. v cc 150 k ? 100 ? v refout v refout 200 k ? 2.0 k ? v refout v refout 200 k ? 2.0 k ? v refout v refout 100 k ? 2.0 k ? v refout v refout 100 k ? 2.0 k ?
TB6556FG 2012-10-22 5 pin description symbol input/output signal input/output internal circuit lead angle setting signal input pin 0 v: 0 5 v: 58 (5-bit ad) la when la is fixed externally, connect ll to gnd and ul to v refout , and then input the setting voltage to the la pin. input voltage range: 0 v to 5.0 v (v refout ) input voltage of v refout or higher is clipped to v refout . when la is fixed automatically, open the la pin. in this state, the la pin is used only for confirmation of la width. gain setting signal input (la setting) g in g out non-inverted amplifier 25 db (max) g out output voltage low: gnd high: v cc ? 1.7 v peak hold (la setting) ph connect the peak-hold capacitor and discharge resistor to gnd, parallel to each other. 100 k ? /0.1 f recommended low-pass filter (la setting) lpf connect the low-pass filter capacitor built-in 100 k ? (typ.) resistor 0.1 f recommended lower limit for la ll clip lower limit for la ll = 0 v to 5.0 v when ll ? ul, la is fixed at ll value. v cc 100 ? 100 ? v cc 100 k ? 100 ? 100 ? v cc v cc 200 k ? v cc 200 k ? 100 ? a utomatic la circuit v cc v cc g in g out i dc to peak hold circuit 100 ?
TB6556FG 2012-10-22 6 pin description symbol input/output signal input/output internal circuit upper limit for la ul clip upper limit for la ul = 0 v to 5.0 v when ll ? ul, la is fixed at ll value. setting dead time input pin l: 3.8 s h or open: 1.9 s t d digital l: 0.8 v (max) h: v refout ? 1 v (min) output logic select signal input pin l: active low h: active high os digital l: 0.8 v (max) h: v refout ? 1 v (min) overcurrent protection signal input pin i dc analog digital filter: 1 s (typ.) gate protected at 0.5 v or higher (released at carrier cycle) clock signal input pin x in clock signal output pin x out operating range 2 mhz to 8 mhz (ceramic oscillation) 360 k ? v refout v refout x out x in v refout v refout 100 k ? 2 k ? v refout v refout 100 k ? 2 k ? v cc 0.5 v 200 k ? 5 pf comparator g out g in 100 ? 100 ? v cc
TB6556FG 2012-10-22 7 pin description symbol input/output signal input/output internal circuit reference voltage signal output pin v refout 5 0.5 v (max 30 ma) reverse-rotation-detection signal output pin rev digital push-pull output: 1 ma (max) fg signal output pin fg digital push-pull output: 1 ma (max) turn-on signal output pin u turn-on signal output pin v turn-on signal output pin w turn-on signal output pin x turn-on signal output pin y turn-on signal output pin z u v w x y z analog push-pull output: 2 ma (max) l: 0.78 v (max) h: v refout ? 0.78 v (min) v refout v refout 100 ? v refout v refout 100 ? v cc v cc v cc v refout 100 ?
TB6556FG 2012-10-22 8 absolute maximum ratings (t a = 25c) characteristics symbol rating unit supply voltage v cc 12 v v in (1) ? 0.3 to v cc (note 1) input voltage v in (2) ? 0.3 to v refout + 0.3 (note 2) v turn-on signal output current i out 2 ma power dissipation p d 1.50 (note 3) w operating temperature t opr ? 30 to 115 (note 4) c storage temperature t stg ? 50 to 150 c note 1: v in (1) pin: v e , la, g in , g out , ph, lpf, ll, ul note 2: v in (2) pin: hu, hv, hw, cw/ccw, res, os, i dc , t d , ss note 3: when mounted on pcb (universal 50 mm ? 50 mm ? 1.6 mm, cu 30%) note 4: operating temperature range is determined by the p d ? t a characteristic. operating conditions (t a = 25c) characteristics symbol min typ. max unit supply voltage v cc 6 7 10 v ceramic oscilla tion frequency x in 2 4 8 mhz ambient temperature t a (c) p d ? t a power dissipation p d (w) 0 0 2.0 (1) when mounted on pcb universal 50 mm ? 50 mm ? 1.6 mm (2) ic only r th (j-a) = 110c/w 1.5 1.0 0.5 50 100 150 200 (2) (1)
TB6556FG 2012-10-22 9 electrical characteristics (t a = 25c, v cc = 7 v) characteristics symbol test circuit test condition min typ. max unit supply current i cc D v refout = open D 5 8 ma i in (1) -1 v in = 5 v la D 25 50 i in (1) -2 v in = 5 v v e D 35 70 i in (2) -1 v in = 0 v hu, hv, hw, ss ? 50 ? 25 D input current i in (2) -2 D v in = 0 v cw/ccw, os, t d , res ? 100 ? 50 D a high v refout ? 1 D v refout v in low D hu, hv, hw, cw/ccw, res, os, t d , ss D D 0.8 v h modulation factor maximum 5.1 5.4 5.7 m refresh start motor operation 1.8 2.1 2.4 input voltage v e l D turned-off refresh 0.7 1.0 1.3 v input hysteresis voltage v h D hu, hv, hw, ss (note 5) D 0.3 D v v dt hu, hv, hw x in = 4.19 mhz D 0.5 D input delay time v dc D idc x in = 4.19 mhz D 1.0 D s v out (h)-1 i out = 2 ma u, v, w, x, y, z v refout ? 0.78 v refout ? 0.3 D v out (l)-1 i out = ? 2 ma u, v, w, x, y, z D 0.3 0.78 v rev (h) i out = 1 ma rev v refout ? 1.0 v refout ? 0.2 D v rev (l) i out = ? 1 ma rev D 0.2 1.0 v fg (h) i out = 1 ma fg v refout ? 1.0 v refout ? 0.2 D v fg (l) i out = ? 1 ma fg D 0.2 1.0 output voltage v refout D i out = 30 ma v refout 4.5 5.0 5.5 v i l (h) v out = 0 v u, v, w, x, y, z D 0 10 output leakage current i l (l) D v out = 3.5 v u, v, w, x, y, z D 0 10 a t off (h) t d = high or open, x in = 4.19 mhz, i out = 2 ma, os = high/low 1.5 1.9 D output off-time by upper/lower transistor (note 6) t off (l) D t d = low, x in = 4.19 mhz, i out = 2 ma, os = high/low 3.0 3.8 D s overcurrent detection v dc D i dc 0.46 0.5 0.54 v amp out g out output current 5 D D ma la gain setting amp amp ofs D g in , g out 11 k ? /1 k ? D ? 40 D mv ' l ll = 0.7 v ? 20 D 20 la limit setting difference ' u D ul = 2.0 v ? 20 D 20 mv la peak hold output current ph out D ph output current D D 5 ma t la (0) D la = 0 v or open, hall in = 100 hz D 0 D t la (2.5) D la = 2.5 v, hall in = 100 hz 27.5 32 34.5 lead angle correction t la (5) D la = 5 v, hall in = 100 hz 53.5 59 62.5 v cc (h) D output start operation point 4.2 4.5 4.8 v cc (l) D no output operation point 3.7 4.0 4.3 v cc monitor v h D input hysteresis width D 0.5 D v note 5: toshiba does not implement testing before shipping.
TB6556FG 2012-10-22 10 note 6: t off os = high os = low 0.78 v 0.78 v t off t off 0.78 v 0.78 v turn-on signal (u, v, w) turn-on signal (x, y, z) v refout ? 0.78 v t off turn-on signal (u, v, w) turn-on signal (x, y, z) t off v refout ? 0.78 v v refout ? 0.78 v v refout ? 0.78 v
TB6556FG 2012-10-22 11 functional description 1. basic operation the motor is driven by the square-wave turn-on signal based on a positional signal. when the positional signal reaches frequency f = 5 hz or higher, the rotor position is estimated according to the positional signal and a modulation wave is generated. the modulation wave and the triangular wave are compared; then the sine-wave pwm signal is generated and the motor is driven. from start to 5 hz: when driven by square wave (120 turn-on) f = f osc / (2 12 ? 32 ? 6) 5 hz or higher: when driven by sine-wave pwm (180 turn-on); when f osc = 4 mhz, approx. 5 hz 2. select drive function this function can select drive mode. ss pin high or open = sine-wave pwm drive (180 turn-on mode) low = square-wave drive (120 turn-on mode) note: if the position sensing signal is f = 5 hz or lower, the driver is 120 turn-on mode even when ss = high. 3. v e voltage command signal function and function to stabilize bootstrap voltage (1) when the voltage command signal is input at v e 1.0 v: turns off output (gate protection) (2) when the voltage command signal is input at 1.0 v ? v e 2.1 v: turns on the lower transistor at the regular (carrier) cycle. (on duty is approx. 8%.) (3) when the voltage command signal is input at v e ? 2.1 v: during sin-wave drive, outputs drive signal as it is. during square-drive, forcibly turns on the lower transistor at regular (carrier) cycle. (on duty is approx. 8%) note: at startup, turn th e lower transistor on for a fixed time with 1.0 v ? v e 2.1 v to charge the upper transistor gate power supply. 4. dead time function: upper/lower transistor output off-time when the motor is driven by sine-wave pwm, dead time is digitally generated in the ic to prevent a short circuit caused by the simultaneous turning on of upper and lower external power devices. when a square wave is generated in full-duty cycle mode, the dead time function is turned on to prevent a short circuit. t d pin internal counter t off high or open 8/f osc 1.9 s low 16/f osc 3.8 s t off values above are obtained when f osc = 4.19 mhz. f osc = reference clock (ceramic oscillation) (1) (2) (3) 100% 2.1 v 1.0 v 5.4 v v e pwm duty
TB6556FG 2012-10-22 12 5. correcting the lead angle the lead angle can be corrected in the turn-on signal range from 0 to 58 in relation to the induced voltage. analog input from la pin (0 v to 5 v divided by 32): 0 v = 0 5 v = 58 (when more than 5 v is input, 58) 6. setting the carrier frequency this function sets the triangular wave cycle (carrier cycle) necessary for generating the pwm signal. (the triangular wave is used for forcibly turning on the lower transistor when the motor is driven by square wave.) carrier cycle = f osc /252 (hz) f osc = reference clock (ceramic oscillation) 7. switching the output of the turn-on signal this function switches the output of the turn-on signal between high and low. pin os: high = active high low = active low 8. outputting the reverse rotation detection signal this function detects the motor rotation direction every electrical angle of 360. (the output is high immediately after reset.) when the signal of rev terminal is low, the operation transfers to 180 commutation mode. (hall in = 5 hz or more) cw/ccw pin actual motor rotating direction rev pin cw (forward) low low (cw) ccw (reverse) high cw (forward) high high (ccw) ccw (reverse) low 9. protecting input pin 1. overcurrent protection (pin i dc ) when the dc-link-voltage which is converted from dc-link-current exceeds the internal reference voltage, performs gate block protection. overcurrent protection is released for each carrier frequency. reference voltage = 0.5 v (typ.) 2. gate protection (pin res) output is turned off when the input signal is low, restarted when the input signal is high. the abnormality is detected externally and the signal input to pin res. res pin os pin output turn-on signal (u, v, w, x, y, z) low high low high low (when res = low, bootstrap capacitor charging stops.)
TB6556FG 2012-10-22 13 3. internal protection ? positional signal abnormality protection output is turned off when the positional signal is hhh or lll; otherwise, it is restarted. ? low power supply voltage protection (v cc monitor) for power supply on/off outside the operating voltage range, the turn-on signal output is kept at high impedance outside the operating voltage range to prevent damage caused by power device short circuits. however, if the voltage level is supplied from the v e pin, this function is restricted, e.g., when v e ? 4.9 v is applied, low power supply voltage protection does not operate. output at high impedance turn-on signal power supply voltage 4.5 v (typ.) 4.0 v (typ.) gnd v m v cc output at high impedance output
TB6556FG 2012-10-22 14 operation flow note: output on time is decreased by the dead time (carrier cycle ? 92% ? t d ? 2) sine-wave pattern (modulation signal) triangular wave (carrier frequency) position detector counter system clock generator phase matching positional signal (hall ic) voltage instruction oscillator comparator phase w phase v phase u u x v y w z voltage command signal v e driven by sine wave modulation ratio (modulation signal) 2.1 v (typ.) 100% 5.4 v (typ.) 0 voltage command signal v e driven by square wave output on duty (u, v, w) 2.1 v (typ.) 92% (note) 5.0 v (typ.)
TB6556FG 2012-10-22 15 the modulation waveform is generated using hall signals. the modulation waveform is then compared with the triangular wave and a sine-wave pwm signal is generated. the time (electrical degrees: 60) from the rising (or falling) edges of the three hall signals to the next falling (or rising) edges is counted. the counted time is used as the data for the next 60 phase of the modulation waveform. there are 32 items of data for the 60 phase of the modulation waveform. the time width of one data item is 1/32 of the time width of the 60 phase of the previous modulation waveform. the modulation waveform moves forward by the width. in the above diagram, the modulation waveform (1)? data moves forward by the 1/32 time width of the time (1) from hu: ? to hw: ? . similarly, data (2)? moves forward by the 1/32 time width of the time (2) from hw: ? to hv: ? . if the next edge does not occur after the 32 data items end, the next 32 data items move forward by the same time width until the next edge occurs. the modulation wave is brought into phase with every zero-cross point of the hall signal. the modulation wave is reset in synchronization with the rising and falling edges of the hall signal at every 60 electrical angle. thus, when the hall device is not placed at the correct position or during acceleration and deceleration, the modulation waveform is not continuous at every reset. *t s v (1)? 1 2 3 4 5 6 30 31 32 32 data items *t * t = t(1) ? 1/32 hu hv hw s u s v sw (5) (2) (6) (1) (3) (6)? (1)? (2)? (3)? * hu, hv, hw: hall signals
TB6556FG 2012-10-22 16 timing charts timing charts may be simplified for explanatory purposes. hall signal (input) hu hv hw fg signal (output) fg turn-on signal when driven by square wave (output) u v w x y z s u s v s w modulation waveform when driven by sine wave (inside of ic) forward hu hv hw fg signal (output) fg u w x y z s u s v s w hall signal (input) v reverse turn-on signal when driven by square wave (output) modulation waveform when driven by sine wave (inside the ic)
TB6556FG 2012-10-22 17 operating waveform when driven by square wave (cw/ccw = low, os = high, ss = high) to stabilize the bootstrap voltage, the lower outputs (x, y, and z) are always turned on at the carrier cycle even during off time. at that time, the upper outputs (u, v, and w) are assigned dead time and turned off at the timing when the lower outputs are turned on. (t d varies with input v e. ) carrier cycle = f osc /252 (hz) dead time: t d = 16/f osc (s) (in more than v e = 5.0 v when t d = low.) t onl = carrier cycle ? 8% (s) (uniformity) when the motor is driven by a square wave, acceleration or deceleration is determined by voltage v e . the motor accelerates or decelerates according to the on duty of t onu . (see the diagram of output on duty on page 14.) note: the motor is driven by a square wave when the hall signals are 5 hz or lower (f osc = 4 mhz) and the motor is rotating in the reverse direction to that of the TB6556FG controlling it (rev = high). hall signal hu hv hw enlarged waveform u x v y w z output waveform t onu t onl t d w z t d
TB6556FG 2012-10-22 18 operating waveform when driven by sine-wave pwm (cw/ccw = low, os = high, ss = high) when driven by a sine wave, the motor is accelerated or decelerated according to the on duty of t onu as the amplitude of the modulation symbol changes according to voltage v e . (see the diagram of the modulation ratio on page 14.) triangular wave frequency = carrier frequency = f osc /252 (hz) note: at startup, the motor is driven by a sine wave when the hall signals are 5 hz or higher (f osc = 4 mhz) and the motor is rotating in the same direction as the TB6556FG controlling it (rev = low). generation inside of ic phase v phase u phase w modulation signal triangular wave (carrier frequency) v uv (u-v) v vw (v-w) v wu (w-u) inter-line voltage output waveform u x v y w z
TB6556FG 2012-10-22 19 example of application circuit note 1: connect to ground as necessary to prevent ic malfunction due to noise. note 2: connect gnd to signal ground on the application circuit. note 3: utmost care is necessary in the design of the output, v cc , and gnd lines since the ic may be destroyed by short-circuiting between outputs, air contamination faults, or faults due to i mproper grounding, or by short-circuiting between contiguous pins. x in x out hu hv hw v e v cc gnd res i dc cw/ccw ss fg t d u x v y w z os mcu hall ic signal (note 1) (note 1) 6 to 10 v system clock generator position detector counter 5-bit ad triangular wave g enerator 6-bit output waveform generator selecting data switching 120/180 & gate block protection on/off setting dead time charger 120- turn-on matrix power-on reset protection & reset 14 15 21 20 19 2 13 11 3 18 17 16 12 4 7 5 8 6 9 10 phase matching fg rotating direction st/sp cw/ccw err gb comparator comparator comparator comparator pwm hu hv hw 120/180 phase w phase u rev ph phase v internal reference voltage 22 peak hold filter + 25 24 26 27 la 28 lower limit upper limit 30 29 g in g out lpf v refout 23 v refout v refout ul ll regulator 1 r2 (100 k ? ) r1 (10 k ? ) g = 1 + (r2/r1) m power device 100 k ? 0.1 f
TB6556FG 2012-10-22 20 package dimensions weight: 0.63 g (typ.)
TB6556FG 2012-10-22 21 notes on contents 1. block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplifie d or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics [1] the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] do not insert devices in the wr ong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
TB6556FG 2012-10-22 22 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest ve rsions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and applicat ion notes for product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be used with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted for use in equipments or systems that require extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used f or automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or expl osions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is presented only as guidance for product use. no responsibility is assumed by toshiba for an y infringement of patents or any other intellectual property rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provided in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability whatsoever, including without limitation, indirect, consequential, special, or incidental damages or loss, including without limitation, loss of profits, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? 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